The Position
MTS Advanced Node Process Design Engineer
Semiconductors 
Manufacturing - Automation

Full-time
United States - California 

The Compensation
Benefits - Full

Relocation Assistance Available - Possible for the ideal candidate

Bonus Eligible - Yes
Interview Travel Reimbursed - Yes

As an MTS Design Enablement Engineer, you will be a member of the Design Enablement Team responsible for developing design components for advanced node Process Design Kits (PDK).

 

Required Qualifications

- Bachelor's Degree in Electrical Engineering, Microelectronics, or equivalent

- Minimum of 8 years of work experience in semiconductor or EDA industries

- Solid understanding of semiconductor processes

- Physical design experience in deep sub micron, preferably advanced nodes

- Experience with Cadence custom IC Virtuoso platform

- Expertise in Cadence SKILL programming language

- Experience developing PDK device library components and definitions including SKILL parameterized cells (Pcell), symbols, CDF, callbacks, simulation/netlisting

- Experience with physical verification tools for DRC and LVS

- Excellent technical problem solving skills

- Outstanding communication skills - both written and verbal; demonstrated ability to communicate at various levels within an organization.

- Good attitude and interpersonal skills, tactful and works well in team environment

- Self motivated, resourceful, shows initiative and needs minimum supervision

- Well organized and exhibits attention to detail 

 

Desired Qualifications

- Master's Degree in Electrical Engineering, Microelectronics, or equivalent

- Experience with Mentor Calibre physical verification tools

- Familiarity with company process technologies

- Experience with Cadence PAS tools

- Experience developing PyCells

- Proficiency in other scripting languages: Python, Perl, TCL, shell, etc.

The Candidate
7+ to 10 years of experience
Minimum Education - Bachelor's Degree

Willingness to Travel - Occasionally

Skills and Certifications  (bold if required)
Minimum 8 yrs experience in semiconductor 
Physical design deep sub micron 
Cadence SKILL programming 
Develop PDK device library components; definitions 

The Ideal Candidate

- Excellent technical problem solving skills

- Outstanding communication skills - both written and verbal; demonstrated ability to communicate at various levels within an organization.

- Good attitude and interpersonal skills, tactful and works well in team environment

- Self motivated, resourceful, shows initiative and needs minimum supervision

- Well organized and exhibits attention to detail

The ideal candidate has worked for these companies:

TSMC, UMC, TI, Samsumg Semi (SSA), Intel, any foundry globally

 

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