ASIC / FPGA Principal Design Verification Engineer FPGA
Remote, from home possible
You will be supporting the DNA
Sequencing unit, responsible for all aspects of the verification of FPGA
designs including block-level and chip-level functional test plan development,
test bench and models creation, detailed verification of every aspect of the
chip functionality. In addition, you will engage in other aspects of design
verification, including front-end architecture planning, system modeling,
external IP integration, flow development, and EDA tool evaluation and
selection.
ESSENTIAL FUNCTIONS:
Ownership of all aspects of
the design verification of the FPGA chips and/or its functional blocks
Test Plan ownership, and
coordination with Architecture, Design, DFT, and other teams to deliver a
complete, comprehensive verification plan
Ownership of system, chip, and
IP models for verification
Evaluation and selection of
flows and EDA tools
Development and deployment of
processes and flows for Design Verification
MINIMUM REQUIREMENTS:
EXPERT LEVEL SYSTEM VERILOG AND
UVM EXP, LEADING DESIGN VERIFICATION TEAMS
A Master or BS degree in EE/CS
with 10+ years of industry experience in ASIC / FPGA design verification
Hands-on experience in the
entire verification process, from test plan to block and system level
simulation, using standard EDA tools (Cadence Incisive suite and/or Mentor
Questa)
Experience with complex SOC UVM
and related verification methodologies and tools
Hands-on experience with Block
level and System level tests writing for FPGA / ASIC designs
Experience with code coverage
methodology
Domain expertise in standard bus
protocols: AXI, PCIe, DDR (Must have minimum of 2 out of 3); Experience with 1
of the following SPI, LVDS, I2C, or SERDES, is a plus
FPGA-based co-simulation, and
emulation platforms for Design Verification
Working knowledge of SystemVerilog & Object Oriented
techniques
Scripting languages such as Perl,
Python, Shell
Solid debugging and problem solving skills
Xilinx and ARM are a plus
Good communication skills,
both oral and written, and strong listening ability
10+ to 15 years
experience, Seniority Level - Mid-Senior
Minimum Education - Bachelor's
Degree, Willingness to Travel Occasionally
